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Product>>8051 MicroController>>STC15F4K60S2 series


Features:

 

  • Enhanced 8051 Central Processing Unit, 1T, single clock per machine cycle, faster 8~12 times than the rate of a traditional 8051.
  • Operating voltage range :
    • STC15F4K60S2 series: 5.5V ~ 4.2V.
    • STC15L4K60S2 series: 3.6V ~ 2.4V.
  • On-chip 16K/32K/40K/48K/56K/58K/61K/63.5K FLASH program memory with flexible ISP/IAP capability,can be repeatedly erased more than100 thousand times.
  • Large capacity of on-chip 4096 bytes SRAM: 256 byte scratch-pad RAM and 1792 bytes of auxiliary RAM
  • Be capable of addressing up to 64K byte of external RAM
  • On-chip EEPROM with large capacity can be repeatedly erased more than 100 thousand times.
  • Dual Data Pointer (DPTR) to speed up data movement
  • ISP/IAP, In-System-Programming and In-Application-Programming , no need for programmer and emulator.
  • 8 channels and 10 bits Analog-to-Digital Converter (ADC), the speed up to 300 thousand timesper second, 3 channels PWM also can be used as 3 channels D/A Converter(DAC).
  • 3 channels Capture/Compare uints (CCP /PCA /PWM)
    ---- can be used as 3 Times or 3 external Interrupts (which can be generated on rising or falling edge)or 3 channels D/A Converter
  • The high-speed pulse function of CCP/PCA can be utilized to realize 3 channels 9 ~ 16 bits PWM(each channel of which takes less than 0.6% system time )
  • The Clock output function of T0,T1or T2 can be utilized to realize 8 ~ 16 bits PWM with a high degree of accuracy (which takes less than 0.4% system time )
  • Internal hghly reliable Reset with 8 levels optional threshold voltage of reset,so that external reset curcuit can be completely removed.
  • Internal high- precise R/C clock(±0.3%) with ±1% temperature drift (-40~+85°C) while ±0.6% (-20~+65°C) in normal temperature and wide frenquency adjustable between 5MHz and 35MHz (5.5296MHz /11.0592MHz / 22.1184MHz / 33.1776MHz).
  • Operating frequency range:0- 28MHz, is equivalent to traditional 8051:0~336MHz.
  • Two high-speed asynchronous serial ports----UARTs (UART1/UART2 can be used simultaneously and regarded as 9 serial ports by shifting among 9 groups of pins):
    UART1(RxD/P3.0, TxD/P3.1) can be switched to (RxD_2/P3.6, TxD_2/P3.7),also can be switched to (RxD_3/P1.6, TxD_3/P1.7);
    UART2(RxD2/P1.0, TxD2/P1.1) can be switched to (RxD2_2/P4.6, TxD2_2/P4.7).
  • A high-speed synchronous serial peripheral interface----SPI.
  • Support the function of Encryption Download (to protect your code from being intercepted).
  • Support the function of RS485 Control
  • Code protection for flash memory access, excellent noise immunity, very low power consumption
  • Power management mode: Slow-Down mode, Idle mode(all interrupt can wake up Idle mode),Stop/Power- Down mode.
  • Timers which can wake up stop/power-down mode: have internal low-power special wake-up Timer.
  • Resource which can wake up stop/power-down mode are:
    INT0/P3.2, INT1/P3.3 (INT0/INT1, may begenerated on both rising and falling edges),INT2/P3.6, INT3/P3.7, INT4/P3.0 (INT2 /INT3/INT4, only be generated on falling edge);pins CCP0/CCP1/CCP2; pins T0/T1/T2(their falling edge can wake up if T0/T1/T2 have been enabled before power-down mode, but no interrupts can be generatetd);internal low-power special wake-up Timer.
  • 6 Timers/Counters:three 16-bit reloadable Timers/Counters (T0/T1/T2, T0 and T1 are compatiblewith Timer0/Timer1 of traditional 8051) T0/T1/T2 all can independently achieve external programmable clock output 3 channels) .3 channels CCP PCA PWM also can be used as three Timers
  • Programmable clock output function(output by dividing the frequency of the internal system clock or the input clock of external pin):
    ①The Programmable clock output of T0 is on P3.5/T0CLKO (output by dividing the frequency of the internal system clock or the input clock of external pin T0/P3.4)
    ②The Programmable clock output of T1 is on P3.4/T1CLKO (output by dividing the frequency of the internal system clock or the input clock of external pin T1/P3.5)
    ③The Programmable clock output of T2 is on P3.0/T2CLKO (output by dividing the frequency of theinternal system clock or the input clock of external pin T2/P3.1)
    Three timers/counters in above all can be output by dividing the frequency from 1 to 65536.
    ④The Programmable clock output of master clock is on P5.4/MCLKO, and its frequency can be divided into MCLK/1, MCLK/2, MCLK/4.
    The master clock can either be internal R/C clock or the external input clock or the external crystal oscillator.
    MCLK is the frequency of master clock. MCLKO is the output of master clock.
  • One 15 bitsWatch-Dog-Timer with 8-bit pre-scaler (one-time-enabled)
  • advanced instruction set, which is fully compatible with traditional 8051 MCU, have hardware multiplication / division command.
  • 42/38/30/26 common I/O ports are available, their mode is quasi_bidirectional/weak pull-up(traditional 8051 I/O ports mode) after reset, and can be set to four modes: quasi_bidirectional /weak pull-up, strong pushpull/ strong pull-up, input-only/high-impedance and open drain.
  • the driving ability of each I/O port can be up to 20mA, but it don't exceed this maximum 120mA that the current of the whole chip of 40-pin or more than 40-pin MCU, while 90mA that the current of the whole chip of 16-pin or more than 16-pin MCU or 32-pin or less than 32-pin MCU.
  • Package:LQFP44, LQFP32,TSSOP20, SOP28, SKDIP28, PDIP40.
  • All products are baked 8 hours in high-temperature 175°C after be packaged ,Manufacture guarantee good quality.
  • In Keil C development environment, select the Intel 8052 to compiling and only contain < reg51.h >

 

Product Documents:

General Overview: STC15F4K60S2_Features.pdf

Data Sheet: STC15F4K60S2.pdf

ROSH:

Product Support:

ISP programming software :STC ISP programming software (v6.88)

Sample & Buy:

Sample:Sample Request Form

Buy :Buy Online

 

STC15F4K60S2 series Selection Table:

 

ParNo Voltage
(V)
Flash
(Byte)
SRAM
(Byte)
T
I
M
E
R
UART PCA
PWM
D/A
A/D
8 ch
I/O W
D
T
Built
in
Reset
EEP
ROM
(Byte)
外部
实时
低压
检测
中断
外部
可调
复位
门槛
电压
支持
掉电
唤醒
外部
中断
掉电
唤醒
专用
定时
Package
40-Pin
36个I/O
Package
64-Pin
60个I/O
Package
48-Pin
44个I/O
S
P
I
STC15F4K60S2 5.5 - 3.5 60K 4096 4 2-3个 2 ch 10bit 60 Y Y 1K Y Y 7个 N PDIP40 LQFP64 LQFP48 Y
STC15F4K48S2 5.5 - 3.5 48K 4096 4 2-3个 2 ch 10bit 60 Y Y 13K Y Y 7个 N PDIP40 LQFP64 LQFP48 Y
STC15F4K56S2 5.5 - 3.5 56K 4096 4 2-3个 2 ch 10bit 60 Y Y 5K Y Y 7个 N PDIP40 LQFP64 LQFP48 Y
STC15F4K52S2 5.5 - 3.5 52K 4096 4 2-3个 2 ch 10bit 60 Y Y 9K Y Y 7个 N PDIP40 LQFP64 LQFP48 Y
STC15F4K48S2 5.5 - 3.5 48K 4096 4 2-3个 2 ch 10bit 60 Y Y 13K Y Y 7个 N PDIP40 LQFP64 LQFP48 Y
STC15F4K40S2 5.5 - 3.5 40K 4096 4 2-3个 2 ch 10bit 60 Y Y 21K Y Y 7个 N PDIP40 LQFP64 LQFP48 Y
STC15F4K32S2 5.5 - 3.5 32K 4096 4 2-3个 2 ch 10bit 60 Y Y 29K Y Y 7个 N PDIP40 LQFP64 LQFP48 Y
STC15F4K16S2 5.5 - 3.5 16K 4096 4 2-3个 2 ch 10bit 60 Y Y 45K Y Y 7个 N PDIP40 LQFP64 LQFP48 Y
STC15F4K08S2 5.5 - 3.5 8K 4096 4 2-3个 2 ch 10bit 60 Y Y 53K Y Y 7个 N PDIP40 LQFP64 LQFP48 Y
IAP15F4K62S2 5.5 - 3.5 62K 4096 4 2-3个 2 ch 10bit 60 Y Y IAP Y Y 7个 N PDIP40 LQFP64 LQFP48 Y
STC15L4K60S2 3.6 - 2.1 60K 4096 4 2-3个 2 ch 10bit 60 Y Y 1K Y Y 7个 N PDIP40 LQFP64 LQFP48 Y
STC15L4K56S2 3.6 - 2.1 56K 4096 4 2-3个 2 ch 10bit 60 Y Y 5K Y Y 7个 N PDIP40 LQFP64 LQFP48 Y
STC15L4K52S2 3.6 - 2.1 52K 4096 4 2-3个 2 ch 10bit 60 Y Y 9K Y Y 7个 N PDIP40 LQFP64 LQFP48 Y
STC15L4K48S2 3.6 - 2.1 48K 4096 4 2-3个 2 ch 10bit 60 Y Y 13K Y Y 7个 N PDIP40 LQFP64 LQFP48 Y
STC15L4K40S2 3.6 - 2.1 40K 4096 4 2-3个 2 ch 10bit 60 Y Y 21K Y Y 7个 N PDIP40 LQFP64 LQFP48 Y
STC15L4K32S2 3.6 - 2.1 32K 4096 4 2-3个 2 ch 10bit 60 Y Y 29K Y Y 7个 N PDIP40 LQFP64 LQFP48 Y
STC15L4K16S2 3.6 - 2.1 16K 4096 4 2-3个 2 ch 10bit 60 Y Y 45K Y Y 7个 N PDIP40 LQFP64 LQFP48 Y
STC15L4K08S2 3.6 - 2.1 8K 4096 4 2-3个 2 ch 10bit 60 Y Y 53K Y Y 7个 N PDIP40 LQFP64 LQFP48 Y
IAP15L4K62S2 3.6 - 2.1 62K 4096 4 2-3个 2 ch 10bit 60 Y Y IAP Y Y 7个 N PDIP40 LQFP64 LQFP48 Y