|Product>>8051 MicroController>>STC8A4K64S2A12 series|
Enhanced 8051 Core with single clock per machine cycle (1T)
Fully compatible instruction set with traditional 8051
22 interrupt sources and 4 interrupt priority levels
Online debugging is supported
2.0 to 5.5V
Up to 64Kbytes of Flash memory to be used to store user code
Configurable EEPROM size, 512bytes single page erased, can be repeatedly erased more than
100 thousand times.
In-System-Programming, ISP in short, can be used to update the application code, no need for programmer.
Online debugging with single chip is supported, and no emulator is needed. The number of
breakpoints is unlimited theoretically.
128 bytes internal direct access RAM
128 bytes internal indirect access RAM
4096 bytes internal extended RAM
RAM expandable externally up to 64 Kbytes
Internal 24MHz high precise R/C clock IRC
Temperature drift: ±1.0% at the temperature range of -40°C to 85°C and ±0.6% at the
temperature range of -20°C to 65°C
Internal 32KHz low speed IRC with large error
External 4MHz~33MHz oscillator or external clock
The three clock source above can be selected freely by used code.
Reset by reset pin with high reset pulse
Watch dog timer reset
Low voltage detection reset. 4 low voltage detection levels are provided, 2.2V, 2.4V, V2.7,V3.0
Writing the reset trigger register using software
22 interrupt sources: INT0, INT1, INT2, INT3, INT4, timer0, timer1, timer2, timer3, timer4,
uart1, uart2, uart3, uart4, ADC, LVD, PCA/CCP, SPI, I2C,
4 interrupt priority levels
5 16-bit timers: timer0, timer1, timer2, timer3, timer4. Where the mode 3 of timer0 has the Non
Maskable Interrupt (NMI in short) function. Mode 0 of
timer0 and timer1 is 16-bit Auto-reload mode.
2 high speed UARTs: uart1, uart2, whose baud rate clock source may be fast as
4 groups of PCA: CCP0, CCP1, CCP2, CCP3, which can be used as capture, high speed output
and 6-bits, 7-bits, 8-bits or 10-bits PWM
8 groups of 15 bit enhanced PWM. Control signal with dead zone can be realized, and external
fault detection function is supported.
SPI: Master mode, slave mode or master/slave automatic switch mode are supported.
I2C: Master mode or slave mode are supported.
ADC: 16 channels 12 bit ADC
Up to 59 GPIOs: P0.0~P0.7, P1.0~P1.7, P2.0~P2.7, P3.0~P3.7, P4.0~P4.4, P5.0~P5.5,
4 modes for all GPIOs: quasi-bidirectional mode, push-pull output mode, open drain mode,
high-impedance input mode
LQFP64, LQFP48, LQFP44
General Overview: STC8A4K64S2A12_Features.pdf
Data Sheet: STC8A4K64S2A12.pdf
ISP programming software ：STC ISP programming software (v6.86)
|STC8A4K64S2A12 series Selection Table|
|Copy right ©2014-2017 stcmicro.com, All Rights Reserved Tel: +86(10) 86974238 E-mail:email@example.com|